Datasheet

2010-2012 Microchip Technology Inc. DS41417B-page 205
PIC16(L)F722A/723A
Power-down Base Current (IPD)
(2)
D027 0.06 0.7 5.0 A 1.8 A/D Current (Note 1, Note 4), no
conversion in progress
0.08 1.0 5.5 A3.0
D027 6 10.7 18 A 1.8 A/D Current (Note 1, Note 4), no
conversion in progress
7 10.6 20 A 3.0
7.2 11.9 22 A 5.0
D027A 250 400 A 1.8 A/D Current (Note 1, Note 4),
conversion in progress
250 400 A3.0
D027A 280 430 A 1.8 A/D Current (Note 1, Note 4,
Note 5), conversion in progress
280 430 A 3.0
280 430 A 5.0
D028 2.2 3.2 14.4 A 1.8 Cap Sense Low Power
Oscillator mode
—3.34.415.6A3.0
D028 6.5 13 21 A 1.8 Cap Sense Low Power
Oscillator mode
8 14 23 A 3.0
8 14 25 A 5.0
D028A 4.2 6 17 A 1.8 Cap Sense Medium Power
Oscillator mode
—6 7 18A3.0
D028A 8.5 15.5 23 A 1.8 Cap Sense Medium Power
Oscillator mode
11 17 24 A 3.0
11 18 27 A 5.0
D028B 12 14 25 A 1.8 Cap Sense High Power
Oscillator mode
—32 35 44 A3.0
D028B 16 20 31 A 1.8 Cap Sense High Power
Oscillator mode
36 41 50 A 3.0
42 49 58 A 5.0
23.3 DC Characteristics: PIC16(L)F722A/723A-I/E (Power-Down) (Continued)
PIC16LF722A/723A
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +85°C for industrial
-40°C T
A +125°C for extended
PIC16F722A/723A
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C T
A +85°C for industrial
-40°C T
A +125°C for extended
Param
No.
Device Characteristics Min. Typ†
Max.
+85°C
Max.
+125°C
Units
Conditions
V
DD Note
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: The peripheral current is the sum of the base I
DD or IPD and the additional current consumed when this peripheral is
enabled. The peripheral current can be determined by subtracting the base I
DD or IPD current from this limit. Max
values should be used when calculating total current consumption.
2: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with
the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD.
3: Fixed Voltage Reference is automatically enabled whenever the BOR is enabled.
4: A/D oscillator source is F
RC.
5: 0.1 F capacitor on V
CAP (RA0).