Datasheet

PIC16F72X/PIC16LF72X
DS41341E-page 88 © 2009 Microchip Technology Inc.
FIGURE 6-22: BLOCK DIAGRAM OF RE<2:0>
FIGURE 6-23: BLOCK DIAGRAM OF RE3
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
RD
WR
WR
RD
To A/D Converter
ANSE<0:2>
Data Bus
PORTE
TRISE
TRISE
PORTE
Note: RE<2:0> are not implemented on PIC16F722/723/726/PIC16LF722/723/726.
I/O Pin
V
SS
RD
RD
Data Bus
TRISE
PORTE
VSS
High-Voltage
Detect
In-Circuit Serial Programming™ mode
Pulse Filter
MCLR
MCLR Circuit
Power for Programming Flash
VDD
Weak
ICSP™ Mode Detect