Datasheet

© 2009 Microchip Technology Inc. DS41341E-page 75
PIC16F72X/PIC16LF72X
FIGURE 6-13: BLOCK DIAGRAM OF RC0
FIGURE 6-14: BLOCK DIAGRAM OF RC1
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
RD
WR
WR
RD
T1OSCEN
Data Bus
PORTC
TRISC
TRISC
PORTC
To Timer1 CLK Input
Oscillator
Circuit
RC1/T1OSI
0
1
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
RD
WR
WR
RD
T1OSCEN
Data Bus
PORTC
TRISC
TRISC
PORTC
To CCP2
(1)
Input
CCP2OUT
CCP2OUT
Enable
Oscillator
Circuit
RC0/T1OSO
Note 1: CCP2 input is controlled by CCP2SEL in the APFCON register.