Datasheet

PIC16F72X/PIC16LF72X
DS41341E-page 138 © 2009 Microchip Technology Inc.
TABLE 15-3: SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
ANSELB
— — ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0 --11 1111 --11 1111
APFCON
— — — — — — SSSEL CCP2SEL ---- --00 ---- --00
CCP1CON
— — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
CCP2CON
— — DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
CCPRxL Capture/Compare/PWM Register X Low Byte xxxx xxxx uuuu uuuu
CCPRxH Capture/Compare/PWM Register X High Byte xxxx xxxx uuuu uuuu
INTCON GIE PEIE
T0IE INTE RBIE T0IF INTF RBIF
0000 000x 0000 000x
PIE1 TMR1GIE
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
PIE2
— — — — — — —
CCP2IE ---- ---0 ---- ---0
PIR1 TMR1GIF
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
PIR2
— — — — — — —
CCP2IF ---- ---0 ---- ---0
T1CON
TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
—TMR1ON
0000 00-0 uuuu uu-u
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS1 T1GSS0 0000 0x00 0000 0x00
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111
1111 1111
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture.