Datasheet

PIC16(L)F722A/723A
DS41417B-page 220  2010-2012 Microchip Technology Inc.
FIGURE 23-14: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 23-9: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 23-15: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TABLE 23-10: USART SYNCHRONOUS RECEIVE REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
US120 T
CKH2DTV SYNC XMIT (Master and Slave)
Clock high to data-out valid
3.0-5.5V — 80 ns
1.8-5.5V — 100 ns
US121 TCKRF Clock out rise time and fall time
(Master mode)
3.0-5.5V — 45 ns
1.8-5.5V — 50 ns
US122 TDTRF Data-out rise time and fall time 3.0-5.5V — 45 ns
1.8-5.5V — 50 ns
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param.
No.
Symbol Characteristic Min. Max. Units Conditions
US125 T
DTV2CKL SYNC RCV (Master and Slave)
Data-hold before CK  (DT hold time) 10 — ns
US126 T
CKL2DTL Data-hold after CK  (DT hold time) 15 — ns
Note: Refer to Figure 23-2 for load conditions.
US121
US121
US120
US122
CK
DT
Note: Refer to Figure 23-2 for load conditions.
US125
US126
CK
DT