Datasheet

PIC16F72
DS39597C-page 78 © 2007 Microchip Technology Inc.
IORLW Inclusive OR Literal with W
Syntax: [ label ] IORLW k
Operands: 0 k 255
Operation: (W) .OR. k (W)
Status Affected: Z
Description: The contents of the W register are
OR’d with the eight-bit literal ‘k’.
The result is placed in the W
register.
IORWF Inclusive OR W with f
Syntax: [ label ] IORWF f,d
Operands: 0 f 127
d [0,1]
Operation: (W) .OR. (f) (destination)
Status Affected: Z
Description: Inclusive OR the W register with
register ‘f’. If ‘d’ = ‘0’, the result is
placed in the W register. If ‘d’ = ‘1’,
the result is placed back in
register ‘f’.
MOVF Move f
Syntax: [ label ] MOVF f,d
Operands: 0 f 127
d [0,1]
Operation: (f) (destination)
Status Affected: Z
Description: The contents of register ‘f’ are
moved to a destination dependant
upon the status of ‘d’. If ‘d’ = ‘0’,
the destination is W register. If
‘d’ = ‘1’, the destination is file reg-
ister ‘f’ itself. ‘d’ = ‘1’ is useful to
test a file register, since status
flag Z is affected.
MOVLW Move Literal to W
Syntax: [ label ] MOVLW k
Operands: 0 k 255
Operation: k (W)
Status Affected: None
Description: The eight-bit literal ‘k’ is loaded
into W register. The don’t cares
will assemble as ‘0’s.
MOVWF Move W to f
Syntax: [ label ] MOVWF f
Operands: 0 f 127
Operation: (W) (f)
Status Affected: None
Description: Move data from W register to
register ‘f’.
NOP No Operation
Syntax: [ label ] NOP
Operands: None
Operation: No operation
Status Affected: None
Description: No operation.