Datasheet

© 2007 Microchip Technology Inc. DS39597C-page 67
PIC16F72
FIGURE 11-6: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD THROUGH
PULL-UP RESISTOR)
FIGURE 11-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 1
FIGURE 11-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 2
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST