Datasheet

PIC16F72
DS39597C-page 18 © 2007 Microchip Technology Inc.
2.3 PCL and PCLATH
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13-bits
wide. The low byte is called the PCL register. This reg-
ister is readable and writable. The high byte is called
the PCH register. This register contains the PC<12:8>
bits and is not directly readable or writable. All updates
to the PCH register go through the PCLATH register.
Figure 2-3 shows the four situations for the loading of
the PC.
• Example 1 shows how the PC is loaded on a write
to PCL (PCLATH<4:0> → PCH).
• Example 2 shows how the PC is loaded during a
GOTO instruction (PCLATH<4:3> → PCH).
• Example 3 shows how the PC is loaded during a
CALL instruction (PCLATH<4:3> → PCH), with
the PC loaded (PUSH’d) onto the Top-of-Stack.
• Example 4 shows how the PC is loaded during
one of the return instructions, where the PC is
loaded (POP’d) from the Top-of-Stack.
FIGURE 2-3: LOADING OF PC IN DIFFERENT SITUATIONS
PC
12 8 7 0
5
PCLATH<4:0>
PCLATH
ALU result
Opcode <10:0>
8
PC
12 11 10 0
11
PCLATH<4:3>
PCH PCL
87
2
PCLATH
PCH PCL
Example 1 - Instruction with PCL as destination
Example 2 - GOTO Instruction
Stack (13-bits x 8)
Top-of-Stack
Stack (13-bits x 8)
Top -of -Sta ck
Opcode <10:0>
PC
12 11 10 0
11PCLATH<4:3>
87
2
PCLATH
PCH PCL
Example 3 - CALL Instruction
Stack (13-bits x 8)
Top-of-Stack
Opcode <10:0>
PC
12 11 10 0
11
87
PCLATH
PCH PCL
Example 4 - RETURN, RETFIE, or RETLW Instruction
Stack (13-bits x 8)
Top-of-Stack
13
13
Note: PCLATH is not updated with the contents of PCH.