Datasheet

© 2007 Microchip Technology Inc. DS39597C-page 99
PIC16F72
FIGURE 14-10: SPI MASTER MODE TIMING (CKE = 0, SMP = 0)
FIGURE 14-11: SPI MASTER MODE TIMING (CKE = 1, SMP = 1)
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
70
71 72
73
74
75, 76
78
79
80
79
78
MSb LSb
Bit6 - - - - - -1
MSb In
LSb In
Bit6 - - - -1
Note: Refer to Figure 14-3 for load conditions.
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
81
71 72
74
75, 76
78
80
MSb
79
73
MSb In
Bit6 - - - - - -1
LSb In
Bit6 - - - -1
LSb
Note: Refer to Figure 14-3 for load conditions.