Datasheet

PIC16F716
DS41206B-page 70 © 2007 Microchip Technology Inc.
TABLE 9-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS OF THE PIC16F716
Register
Power-on Reset,
Brown-out Reset
MCLR
Resets
WDT Reset
Wake-up via WDT or
Interrupt
W xxxx xxxx uuuu uuuu uuuu uuuu
INDF N/A N/A N/A
TMR0 xxxx xxxx uuuu uuuu uuuu uuuu
PCL 0000h 0000h PC + 1
(2)
STATUS 0001 1xxx 000q quuu
(3)
uuuq quuu
(3)
FSR xxxx xxxx uuuu uuuu uuuu uuuu
PORTA
(4), (5), (6)
--xx 0000 --xx 0000 --uu uuuu
PORTB
(4), (5)
xxxx xxxx uuuu uuuu uuuu uuuu
PCLATH ---0 0000 ---0 0000 ---u uuuu
INTCON 0000 -00x 0000 -00u uuuu -uuu
(1)
PIR1 -0-- -000 -0-- -000 -u-- -uuu
(1)
TMR1L xxxx xxxx uuuu uuuu uuuu uuuu
TMR1H xxxx xxxx uuuu uuuu uuuu uuuu
T1CON --00 0000 --uu uuuu --uu uuuu
TMR2 0000 0000 0000 0000 uuuu uuuu
T2CON -000 0000 -000 0000 -uuu uuuu
CCPR1L xxxx xxxx uuuu uuuu uuuu uuuu
CCPR1H xxxx xxxx uuuu uuuu uuuu uuuu
CCP1CON 0000 0000 0000 0000 uuuu uuuu
PWM1CON 0000 0000 0000 0000 uuuu uuuu
ECCPAS 00-0 0000 00-0 0000 u-uu uuuu
ADRES xxxx xxxx uuuu uuuu uuuu uuuu
ADCON0 0000 0000 0000 0000 uuuu uuuu
OPTION_REG 1111 1111 1111 1111 uuuu uuuu
TRISA --11 1111 --11 1111 --uu uuuu
TRISB 1111 1111 1111 1111 uuuu uuuu
PIE1 -0-- -000 -0-- -000 -u-- -uuu
PCON ---- --qq ---- --uu ---- --uu
PR2 1111 1111 1111 1111 uuuu uuuu
ADCON1 ---- -000 ---- -000 ---- -uuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition
Note 1: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 9-5 for Reset value for specific condition.
4: On any device Reset, these pins are configured as inputs.
5: This is the value that will be in the port output latch.
6: Output latches are unknown or unchanged. Analog inputs default to analog and read ‘0’.