Datasheet
© 2007 Microchip Technology Inc. DS41206B-page 41
PIC16F716
7.2.7 ADC REGISTER DEFINITIONS
The following registers are used to control the
operation of the ADC.
REGISTER 7-1: ADCON0: A/D CONTROL REGISTER 0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0
ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE
—
ADON
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 ADCS<1:0>: A/D Conversion Clock Select bits
00 = F
OSC/2
01 = F
OSC/8
10 = F
OSC/32
11 = F
RC (Clock derived from the internal ADC RC oscillator)
bit 5-3 CHS<2:0>: Analog Channel Select bits
000 = AN0
001 = AN1
010 = AN2
011 = AN3
100 = Reserved, do not use
101 = Reserved, do not use
110 = Reserved, do not use
111 = Reserved, do not use
bit 2 GO/DONE
: A/D Conversion Status bit
1 = A/D conversion cycle in progress. Setting this bit starts an A/D conversion cycle.
This bit is automatically cleared by hardware when the A/D conversion has completed.
0 = A/D conversion completed/not in progress
bit 1 Unimplemented: Read as ‘0’
bit 0 ADON: ADC Enable bit
1 = ADC is enabled
0 = ADC is disabled and consumes no operating current