Datasheet

© 2007 Microchip Technology Inc. DS41206B-page 25
PIC16F716
FIGURE 3-10: BLOCK DIAGRAM OF RB7/P1D PIN
TABLE 3-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuu
TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
OPTION_REG RBPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
Legend:
x = unknown, u = unchanged. Shaded cells are not used by PORTB.
Data Latch
From other
RBPU
(1)
P
V
DD
QD
CK
QD
CK
QD
EN
QD
EN
DATA BUS
WR PORTB
WR TRISB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB<7:4> pins
weak
pull-up
RD PORTB
Latch
TTL
Buffer
Q3
Q1
Note 1: To enable weak pull-ups,
set the appropriate TRIS
bit(s) and clear the RBPU
bit of the OPTION register.
VSS
VDD
RB7/P1D
0
1
Q
PWMD(P1D) Enable
PWMD(P1D) Data out
PWMD(P1D) Auto-shutdown tri-state
ST
Buffer
ICSPD – In-Circuit Serial Programming™ Data Input