Datasheet

PIC16F716
DS41206B-page 24 © 2007 Microchip Technology Inc.
FIGURE 3-8: BLOCK DIAGRAM OF RB5/P1B PIN
FIGURE 3-9: BLOCK DIAGRAM OF RB6/P1C PIN
Data Latch
From other
RBPU
(1)
P
V
DD
QD
CK
QD
CK
QD
EN
QD
EN
DATA BUS
WR PORTB
WR TRISB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB<7:4> pins
weak
pull-up
RD PORTB
Latch
TTL
Buffer
Q3
Q1
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU
bit (OPTION register).
VSS
VDD
RB5/P1B
0
1
Q
PWMB(P1B) Enable
PWMB(P1B) Data out
PWMB(P1B) Auto-shutdown tri-state
Data Latch
From other
RBPU
(1)
P
V
DD
QD
CK
QD
CK
QD
EN
QD
EN
DATA BUS
WR PORTB
WR TRISB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB<7:4> pins
weak
pull-up
RD PORTB
Latch
TTL
Buffer
Q3
Q1
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU
bit (OPTION register).
VSS
VDD
RB6/P1C
0
1
Q
PWMC(P1C) Enable
PWMC(P1C) Data out
PWMC(P1C) Auto-shutdown tri-state
ST
Buffer
ICSPC – In-Circuit Serial Programming™ Clock Input