Datasheet

PIC16F716
DS41206B-page 22 © 2007 Microchip Technology Inc.
FIGURE 3-4: BLOCK DIAGRAM OF RB1/T1OSO/T1CKI PIN
FIGURE 3-5: BLOCK DIAGRAM OF RB2/T1OSI PIN
QD
Q
CK
QD
Q
CK
TTL Buffer
TRIS Latch
Data Latch
RB1/T1OSO/T1CKI
DATA BUS
WR PORTB
WR TRISB
T1OSCEN
RD PORTB
T1OSI (From RB2)
To Timer1 clock input
P
V
DD
weak
pull-up
RBPU
(1)
T1OSCEN
VSS
VDD
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
RD TRISB
D
Q
EN
TMR1 oscillator
ST Buffer
P
V
DD
weak
pull-up
QD
Q
CK
QD
Q
CK
TTL Buffer
TRIS Latch
Data Latch
DATA BUS
WR PORTB
WR TRISB
T1OSCEN
RD PORTB
RB2/T1OSI
RBPU
(1)
T1OSCEN
VSS
VDD
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION register).
RD TRIS
DQ
EN
T1OSO (To RB1)
TMR1
Oscillator