Datasheet

PIC16F716
DS41206B-page 20 © 2007 Microchip Technology Inc.
FIGURE 3-2: BLOCK DIAGRAM OF
RA4/T0CKI PIN
TABLE 3-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
DATA
BUS
WR
PORT
WR
TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
N
V
SS
RA4/T0CKI
Timer0 Clock Input
Q
D
Q
CK
EN
QD
EN
VSS
Q
D
Q
CK
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
PORTA
— — — RA4 RA3 RA2 RA1 RA0 ---x 0000 ---u uuuu
TRISA — — — TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 ---1 1111 ---1 1111
ADCON1 — — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by
PORTA.