Datasheet

© 2007 Microchip Technology Inc. DS41206B-page 101
PIC16F716
FIGURE 12-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
(1)
FIGURE 12-7: BROWN-OUT RESET TIMING
TABLE 12-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
30 T
MCL MCLR Pulse Width (low) 2 — — μsVDD = 5V, -40°C to +125°C
31* TWDT Watchdog Timer Time-out Period 7 18 33 ms VDD = 5V, -40°C to +85°C
(No Prescaler) TBD TBD TBD ms VDD = 5V, +85°C to +125°C
32 T
OST Oscillation Start-up Timer Period — 1024 TOSC ——TOSC = OSC1 period
33* TPWRT Power-up Timer Period 28 72 132 ms VDD = 5V, -40°C to +85°C
TBD TBD TBD ms VDD = 5V, +85°C to +125°C
34 T
IOZ I/O high-impedance from MCLR
Low or WDT Reset
——2.1μs
35 T
BOR Brown-out Reset Pulse Width 100 — — μsVDD ≤ BVDD (D005)
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O Pins
34
Note 1: Refer to Figure 12-3 for load conditions.
VDD
BVDD
35