Datasheet

PIC16F716
DS41206B-page 100 © 2007 Microchip Technology Inc.
FIGURE 12-5: CLKOUT AND I/O TIMING
TABLE 12-3: CLKOUT AND I/O TIMING REQUIREMENTS
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
10* T
OSH2CKLOSC1↑ to CLKOUT↓ —75200 ns(Note 1)
11* TOSH2CKHOSC1↑ to CLKOUT↑ —75 200 ns(Note 1)
12* T
CKR CLKOUT rise time — 35 100 ns (Note 1)
13* TCKF CLKOUT fall time — 35 100 ns (Note 1)
14* TCKL2IOVCLKOUT ↓ to Port out valid — — 20 ns (Note 1)
15* TIOV2CKH Port input valid before CLKOUT ↑ TOSC +
200
—— ns (Note 1)
16* T
CKH2IOI Port input hold after CLKOUT ↑ 0— — ns(Note 1)
17* TOSH2IOVOSC1↑ (Q1 cycle) to Port out valid — 50 150 ns
18* T
OSH2IOIOSC1↑ (Q2 cycle) to Port
input invalid (I/O in hold
time)
Standard 100 — — ns
18A* Extended (LC) 200 — — ns
19* T
IOV2OSH Port input valid to OSC1↑ (I/O in setup time) 0 — — ns
20* TIOR Port output rise time Standard — 10 40 ns
20A* Extended (LC) — — 80 ns
21* T
IOF Port output fall time Standard — 10 40 ns
21A* Extended (LC) — — 80 ns
22††* TINP INT pin high or low time Tcy — — ns
23††* T
RBP RB<7:4> change INT high or low time Tcy — — ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
†† These parameters are asynchronous events not related to any internal clock edge.
Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x T
OSC.
Note 1: Refer to Figure 12-3 for load conditions.
OSC1
CLKOUT
I/O Pin
(input)
I/O Pin
(output)
Q4
Q1
Q2 Q3
10
13
14
17
20, 21
19
18
15
11
12
16
old value
new value