Datasheet

PIC16F716
DS41206A-page 20 Preliminary  2003 Microchip Technology Inc.
FIGURE 3-2: BLOCK DIAGRAM OF
RA4/T0CKI PIN
TABLE 3-1: PORTA FUNCTIONS
TABLE 3-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
DATA
BUS
WR
PORT
WR
TRIS
RD PORT
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
N
V
SS
RA4/T0CKI
TMR0 Clock Input
Q
D
Q
CK
EN
QD
EN
VSS
Q
D
Q
CK
Name Bit# Buffer Function
RA0/AN0 bit 0 TTL Input/output or analog input
RA1/AN1 bit 1 TTL Input/output or analog input
RA2/AN2 bit 2 TTL Input/output or analog input
RA3/AN3/VREF bit 3 TTL Input/output or analog input or VREF
RA4/T0CKI bit 4 ST Input/output or external clock input for Timer0
Output is open drain type
Legend: TTL = TTL input, ST = Schmitt Trigger input
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR,
BOR
Value on all
other
Resets
05h PORTA — — —
(1)
RA4 RA3 RA2 RA1 RA0 --xx 0000 --uu uuuu
85h TRISA — — —
(1)
PORTA Data Direction Register --11 1111 --11 1111
9Fh ADCON1 — — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by
PORTA.
Note 1: Reserved bits, do not use.