Datasheet

 2010-2011 Microchip Technology Inc. DS41418B-page 67
PIC16(L)F707
6.6 PORTE and TRISE Registers
PORTE is a 4-bit wide, bidirectional port. The
corresponding data direction register is TRISE. Setting a
TRISE bit (= 1) will make the corresponding PORTE pin
an input (i.e., put the corresponding output driver in a
High-Impedance mode). Clearing a TRISE bit (= 0) will
make the corresponding PORTE pin an output (i.e.,
enable the output driver and put the contents of the
output latch on the selected pin). The exception is RE3,
which is input only and its TRIS bit will always read as
‘1’. Example 6-5 shows how to initialize PORTE.
Reading the PORTE register (Register 6-16) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch. RE3 reads ‘0’ when
MCLRE = 1.
The TRISE register (Register 6-17) controls the PORTE
pin output drivers, even when they are being used as
analog inputs. The user should ensure the bits in the
TRISE register are maintained set when using them as
analog inputs. I/O pins configured as analog input always
read ‘0’.
EXAMPLE 6-5: INITIALIZING PORTE
6.6.1 ANSELE REGISTER
The ANSELE register (Register 6-18) is used to
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELE bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELE bits has no affect on digital
output functions. A pin with TRIS clear and ANSELE
set will still operate as a digital output, but the Input
mode will be analog. This can cause unexpected
behavior when executing read-modify-write
instructions on the affected port.
Note: The ANSELE register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs
will read ‘0’.
BANKSEL PORTE ;
CLRF PORTE ;Init PORTE
BANKSEL ANSELE ;
CLRF ANSELE ;digital I/O
BANKSEL TRISE ;
MOVLW B‘00001100’ ;Set RE<2> as an input
MOVWF TRISE ;and set RE<1:0>
;as outputs
REGISTER 6-16: PORTE: PORTE REGISTER
U-0 U-0 U-0 U-0 R-x R/W-x R/W-x R/W-x
— — — —
RE3 RE2 RE1 RE0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4 Unimplemented: Read as ‘0’
bit 3-0 RE<3:0>: PORTE I/O Pin bits
1 = Port pin is > V
IH
0 = Port pin is < VIL