Datasheet

PIC16(L)F707
DS41418B-page 120  2010-2011 Microchip Technology Inc.
FIGURE 16-1: CAPACITIVE SENSING BLOCK DIAGRAM
TMRxCS
CPSx0
CPSx1
CPSx2
CPSx3
CPSx4
CPSx5
CPSx6
CPSx7
CPSx8
CPSx9
CPSx10
CPSxCH<3:0>
Capacitive
Sensing
Oscillator
CPSxRNG<1:0>
CPSxRM
TMRx
0
1
Set
TMRxIF
Overflow
TxXCS
0
1
TxCKI
TMRxCS<1:0>
T1OSC/
TxCKI
TMRxH:TMRxL
EN
TxGSS<1:0>
Timer1/3 Gate
Control Logic
TxG
CPSxOUT
CPSx11
CPSx12
CPSx13
CPSx14
CPSx15
CPSxCLK
Note 1: If CPSxON = 0, disabling capacitive sensing, no channel is selected.
FOSC/4
F
OSC
FOSC/4
TimerA/B Module
Timer1/3 Module
CPSxON
(1)
CPSxON
0
1
0
1
Ref-
Ref+
DAC
FVR
Int.
Ref.
CPSxOSC
Watchdog Timer Module
LP WDT
OSC
WDT
Scaler
Overflow
WDT
Event
PS<2:0>
Timer2 Module
TMR2
Overflow
Postscaler
Set
TMR2IF