Information

PIC16F631/677/685/687/689/690
DS80243M-page 6  2010 Microchip Technology Inc.
2. Module: SSP (PIC16F687/689/690 only)
2.1 SSP module does not recognize first Start bit
received.
In any of the I
2
C™ modes, the SSP module will fail
to recognize the first Start bit received after a
transition from module disable to module enable.
Subsequent Stop bits and Start bits are detected
properly.
Work around
Enable the SSP module in SSPMSK Access mode
before changing the mode to the desired I
2
C
operation.
EXAMPLE 1: CODE EXAMPLE
Fix
Rev. A6 Silicon and later revisions.
Affected Silicon Revisions
PIC16F677
PIC16F687/PIC16F689/PIC16F690
2.2 Under certain conditions, the SSPIF flag sets
on reception of the first byte.
When all of the following conditions are met:
• The module is configured as a SPI slave
• CKP = 1
• CKE = 1
• Multiple bytes are sent with the SS
line
remaining low between bytes
The SSPIF flag will only be set on reception of the
first byte and the following bytes will not be
correctly received.
Work around
• Toggle the SS line between bytes
or
• On reception of the first byte modify the SSPM
bits in the SSPCON register to configure the
module as a SPI slave with SS
pin disabled.
Then restore the SSPM bits to the configuration
for SPI slave with SS pin enabled. The module
is then ready for reception of the following byte.
Fix
None.
Affected Silicon Revisions
PIC16F677
PIC16F687/PIC16F689/PIC16F690
A1
A3 A4 A5 A6
XXX
MOVLW B’00111001’ ;Module enable, clock
MOVWF SSPCON ;enable, SSPMSK access.
;Optionally load
;address mask value
;into SSPMSK register.
MOVLW B’00110110’ ;Module enable, clock
MOVWF SSPCON ;enable, 7-bit address
;I
2
C slave.
A1
X
A3 A4 A5
A6
XXX
X