Information

PIC16F631/677/685/687/689/690
DS80243M-page 10  2010 Microchip Technology Inc.
EXAMPLE 3:
5.2 LP/Timer1 Oscillator Operation Below 25°C
1-2% of devices experience reduced drive as
temperatures approach -40°C. This will result in a
loss of Timer1 counts or stopped Timer1
oscillation.
This can also prevent Timer1 oscillator start-up
under cold conditions.
Work around
Use of low-power crystals properly matched to the
device will reduce the likelihood of failure. A 1M
resistor between OSC2 and VDD will further
improve the drive strength of the circuit.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
5.3 LP/Timer1 Oscillator Shared Operation
When using LP oscillator as the system clock and
enabling Timer1 external oscillator, the shared
crystal will clock both the core and Timer1. On
execution of the SLEEP instruction, the oscillator
amplifier will be disabled and Timer1 will not be
clocked while the device is in Sleep.
Work around
None.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
BTFSC TMR1L,0
GOTO $-1
BTFSS TMR1L,0
GOTO $-1 ;Timer has just incremented, 31 s before next rising edge to
;complete reload
Update:
BCF T1CON,TMR1CS ;Select HFINTOSC for Timer1
BSF TMR1H,7 ;Timer1 high byte 0x80
BCF T1CON,TMR1ON ;Timer1 off
BSF T1CON,TMR1CS ;Select external crystal
BCF T1CON,TMR1ON ;Timer1 on
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
A1
X
A3 A4 A5
A6
XXX
X
A1
X
A3 A4 A5 A6
XXX
X