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 2010 Microchip Technology Inc. DS80243M-page 1

PIC16F631/677/685/687/689/690

The PIC16F631/677/685/687/689/690 family devices

that you have received conform functionally to the

current Device Data Sheet (DS41262E), except for the

anomalies described in this document.

The silicon issues discussed in the following pages are

for silicon revisions with the Device and Revision IDs

listed in Table 1. The silicon issues are summarized in

Table 2 through Table 6.

The errata described in this document will be addressed

in future revisions of the PIC16F631/677/685/687/689/

690 silicon.

Data Sheet clarifications and corrections start on page

12, following the discussion of silicon issues.

The silicon revision level can be identified using the

current version of MPLAB

IDE and Microchip’s

programmers, debuggers, and emulation tools, which

are available at the Microchip corporate web site

(www.microchip.com).

For example, to identify the silicon revision level using

MPLAB IDE in conjunction with MPLAB ICD 2,

MPLAB ICD 3, PICkit™ 2 or PICkit™ 3:

1. Using the appropriate interface, connect the

device to the MPLAB ICD 2 programmer/

debugger, PICkit™ 2 or PICkit™ 3.

2. From the main menu in MPLAB IDE, select

onfigure>Select Device, and then select the

target part number in the dialog box.

3. Select the MPLAB hardware tool

(Programmer

>Select Tool).

4. Perform a “Connect” operation to the device

(Programmer

>Connect). Depending on the

development tool used, the part number and

Device Revision ID value appear in the Output

window.

The Device ID values for the various devices and

silicon revisions are shown in Table 1.

Note: This document summarizes all silicon

errata issues from all revisions of silicon,

previous as well as current. Only the

issues indicated in the last column of

Table 2 through Table 6 apply to the

current silicon revision.

Note: If you are unable to extract the silicon

revision level, please contact your local

Microchip sales office for assistance.

TABLE 1: SILICON DEVREV VALUES

Part Number Device ID

(1)

Revision ID for Silicon Revision

(2)

A1 A3 A4 A5 A6

PIC16F631 142x 1

PIC16F677 132x 1

PIC16F685 04Ax 3456

PIC16F687 132x 3 4 5 6

PIC16F689 134x 3 4 5 6

PIC16F690 134x 3 4 5 6

Note 1: The device and revision data is stored in the Device ID located at 2006h in program memory.

2: Refer to the “PIC12F6XX/16F6XX Memory Programming Specification” (DS41204) for detailed

information.

PIC16F631/677/685/687/689/690 Family

Silicon Errata and Data Sheet Clarification

Summary of content (16 pages)

PAGE 1
PIC16F631/677/685/687/689/690 PIC16F631/677/685/687/689/690 Family Silicon Errata and Data Sheet Clarification The PIC16F631/677/685/687/689/690 family devices that you have received conform functionally to the current Device Data Sheet (DS41262E), except for the anomalies described in this document. For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2, MPLAB ICD 3, PICkit™ 2 or PICkit™ 3: 1.
PAGE 2
PIC16F631/677/685/687/689/690 TABLE 2: SILICON ISSUE SUMMARY (PIC16F631) Affected Revisions(1) Feature Item Number Ext. Crystal 5.1 Overflow may take additional count. Timer1 Ext. Crystal 5.2 Oscillator may stop running at low temps. X Timer1 Ext. Crystal 5.3 Sleep in LP mode disables T1OSC. X Prescaler 6. Spurious Reset may occur. X Module Timer1 WDT/Timer0 Note 1: Issue Summary A1 X Only those issues indicated in the last column apply to the current silicon revision.
PAGE 3
PIC16F631/677/685/687/689/690 TABLE 5: SILICON ISSUE SUMMARY (PIC16F687/PIC16F689) Affected Revisions(1) Feature Item Number EUSART Wake-up 1.1 WUE bit not clearing. EUSART Auto-Baud 1.2 Incorrect baud rate after a break. X X EUSART Auto-Baud 1.3 Baud rate value +2. X X EUSART Auto-Baud 1.4 Delay after auto-baud before transmit. X X EUSART Auto-Baud 1.5 R/W bit on ACK. X X EUSART Reset 1.6 Clock-stretching handling. X X EUSART Extra Character 1.
PAGE 4
PIC16F631/677/685/687/689/690 Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision. 1. Module: EUSART (PIC16F687/689/690 only) 1.1 WUE Bit is not clearing. After a wake-up due to a Break character, the WUE bit is not automatically cleared. Work around Clear the WUE bit after waking up. 1.
PAGE 5
PIC16F631/677/685/687/689/690 1.5 Auto-baud sequence cannot be aborted in some cases. If an auto-baud is started but no edges are received, there is no way to leave Auto-Baud mode. Work around Use the Watchdog Timer to reset the entire device. Fix Rev. A5 Silicon and later revisions. Affected Silicon Revisions PIC16F687/PIC16F689/PIC16F690 A3 A4 X X A5 A6 1.7 Extra character transmitted after auto-baud.
PAGE 6
PIC16F631/677/685/687/689/690 2. Module: SSP (PIC16F687/689/690 only) 2.1 SSP module does not recognize first Start bit received. 2.2 Under certain conditions, the SSPIF flag sets on reception of the first byte. When all of the following conditions are met: In any of the I C™ modes, the SSP module will fail to recognize the first Start bit received after a transition from module disable to module enable. Subsequent Stop bits and Start bits are detected properly.
PAGE 7
PIC16F631/677/685/687/689/690 3. Module: ECCP with Auto-Shutdown (Silicon Rev. A4 and previous revisions) (PIC16F685 and PIC16F690 only) Fix Rev. A5 Silicon and later revisions. The PIC16F631/677/685/687/689/690 Rev. A4 silicon for the ECCP auto-shutdown is connected to the C1IF and C2IF flags. See Figures 8-2 and 8-3 on the following page. The auto-shutdown connection (Rev. A4 and previous) to C1IF and C2IF causes the autoshutdown to incorrectly operate synchronously.
PAGE 8
PIC16F631/677/685/687/689/690 FIGURE 8-3: COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM C2POL D Q1 To Data Bus Q EN RD_CM2CON0 C2CH<1:0> 2 D Q3*RD_CM2CON0 EN CL NRESET C2ON(1) C12IN0- 0 C12IN1C2IN2- 1 MUX 2 C2IN3- 3 C2VINC2VIN+ C2SYNC C2POL D C2IN+ FixedRef CVREF 0 MUX 1 0 MUX 1 Note 1: 2: 3: C2VREN FIGURE 1: Rev. A4 and previous: To ECCP Auto-Shutdown C2OUT C2 C2R Set C2IF Q Q Rev.
PAGE 9
PIC16F631/677/685/687/689/690 4. Module: Analog-To-Digital Converter (ADC) Module (PIC16F685/687/689/690 Only) Selecting the VP6 reference as the analog input source (CHS<3:0> = 1101) for the ADC conversion after sampling another analog channel with input voltages approximately greater than 1.2V can temporarily disturb the HFINTOSC oscillator.
PAGE 10
PIC16F631/677/685/687/689/690 EXAMPLE 3: BTFSC GOTO BTFSS GOTO TMR1L,0 $-1 TMR1L,0 $-1 ;Timer has just incremented, 31 s before next rising edge to ;complete reload Update: BCF BSF BCF BSF BCF T1CON,TMR1CS TMR1H,7 T1CON,TMR1ON T1CON,TMR1CS T1CON,TMR1ON ;Select ;Timer1 ;Timer1 ;Select ;Timer1 HFINTOSC for Timer1 high byte 0x80 off external crystal on Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H. 5.
PAGE 11
PIC16F631/677/685/687/689/690 6. Module: Timer0 and WDT Prescaler Assignment Spurious Reset A spurious Reset may occur if the Timer0/Watchdog Timer (WDT) prescaler is assigned from the WDT to Timer0 and then back to the WDT. Work around 1. Disable the Timer0 external clock input by clearing the TOCKI bit in the OPTION register. 2. Modify the TOSE bit in the OPTION register to the opposite configuration for the logic level on the T0CKI pin. 3.
PAGE 12
PIC16F631/677/685/687/689/690 Data Sheet Clarifications The following typographical corrections and clarifications are to be noted for the latest version of the device data sheet (DS41262E): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. 1. Module: Peripheral Features Corrections Summary.
PAGE 13
PIC16F631/677/685/687/689/690 APPENDIX A: DOCUMENT REVISION HISTORY Rev A Document (7/2005) Original release of this document. Clarifications/Corrections to the Data Sheet: Added Modules 1 through 7: Module 1: Device VDD Range Module 2: 4x4 QFN Package Marking Module 3: Table 1-1: Pinout Description – PIC16F685 Module 4: Register 10-5: EECON1 Module 5: Table11-2: Registers Associated with Capture, Compare and Timer1 Module 6: Section 12.0 EUSART Module 7: Section 14.2.
PAGE 14
PIC16F631/677/685/687/689/690 NOTES: . DS80243M-page 14  2010 Microchip Technology Inc.
PAGE 15
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 16
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