Datasheet
PIC16F688
DS41203E-page 38 © 2009 Microchip Technology Inc.
4.2.5.2 RA1/AN1/C1IN-/VREF/ICSPCLK
Figure 4-2 shows the diagram for this pin. The RA1 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• an analog input to the comparator
• a voltage reference input for the A/D
• In-Circuit Serial Programming™ clock
FIGURE 4-2: BLOCK DIAGRAM OF RA1
4.2.5.3 RA2/AN2/T0CKI/INT/C1OUT
Figure 4-3 shows the diagram for this pin. The RA2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• the clock input for Timer0
• an external edge triggered interrupt
• a digital output from the comparator
FIGURE 4-3: BLOCK DIAGRAM OF RA2
I/O pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUA
RD
WPUA
RD PORTA
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
WR
IOCA
RD
IOCA
Interrupt-on-
To Comparator
Analog
(1)
Input Mode
RAPU
Analog
(1)
Input Mode
change
Q3
Note 1: Comparator mode and ANSEL determines analog
Input mode.
To A/D Converter
I/O pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Analog
(1)
Input Mode
Data Bus
WR
WPUA
RD
WPUA
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
WR
IOCA
RD
IOCA
To A/D Converter
0
1
C1OUT
C1OUT
Enable
To INT
To Timer0
Analog
(1)
Input Mode
RAPU
RD PORTA
Interrupt-on-
change
Q3
Note 1: Analog Input mode is based upon ANSEL.