Datasheet

PIC16F688
DS41203E-page 12 © 2009 Microchip Technology Inc.
TABLE 2-4: PIC16F688 SPECIAL FUNCTION REGISTERS SUMMARY BANK 3
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR/BOR
Page
Bank 3
180h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 20, 117
181h OPTION_REG RAPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 14, 117
182h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 19, 117
183h STATUS IRP RP1 RP0 TO
PD ZDCC0001 1xxx 13, 117
184h FSR Indirect Data Memory Address Pointer xxxx xxxx 20, 117
185h TRISA
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 33, 117
186h Unimplemented
187h TRISC
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111 42, 117
188h Unimplemented
189h Unimplemented
18Ah PCLATH
Write Buffer for upper 5 bits of Program Counter ---0 0000 19, 117
18Bh INTCON GIE PEIE T0IE INTE RAIE T0IF INTF RAIF
(2)
0000 000x 15, 117
18Ch Unimplemented
18Dh Unimplemented
190h Unimplemented
191h Unimplemented
192h Unimplemented
193h Unimplemented
194h Unimplemented
195h Unimplemented
196h Unimplemented
19Ah Unimplemented
19Bh Unimplemented
199h Unimplemented
19Ah Unimplemented
19Bh Unimplemented
19Ch Unimplemented
19Dh Unimplemented
19Eh Unimplemented
19Fh Unimplemented
Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
Note 1: Other (non Power-up) Resets include MCLR
Reset and Watchdog Timer Reset during normal operation.
2: MCLR
and WDT Reset does not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set again if the
mismatched exists.