Information

 2010 Microchip Technology Inc. DS80243M-page 7
PIC16F631/677/685/687/689/690
3. Module: ECCP with Auto-Shutdown
(Silicon Rev. A4 and previous
revisions) (PIC16F685 and
PIC16F690 only)
The PIC16F631/677/685/687/689/690 Rev. A4
silicon for the ECCP auto-shutdown is connected
to the C1IF and C2IF flags. See Figures 8-2
and 8-3 on the following page.
The auto-shutdown connection (Rev. A4 and
previous) to C1IF and C2IF causes the auto-
shutdown to incorrectly operate synchronously.
Additionally, reads of CMxCON0 will incorrectly
clear an auto-shutdown event.
Work around
Rev. A4 Silicon and previous revisions.
1) Poll the CxOUT bit until it is low.
2) Read CMxCON0 to precondition CxIF.
3) If CMxCON0 is read while CxOUT is
changing, repeat steps 1 and 2.
Fix
Rev. A5 Silicon and later revisions.
The Silicon Rev. A5 (now shipping) and later
revision devices have moved the auto-shutdown
connection from CxIF to CxOUT. This will eliminate
the synchronous shutdown and simplify the use of
the comparator for a shutdown event. Figure 1
shows the function of auto-shutdown before and
after the device revision.
Affected Silicon Revisions
PIC16F685
PIC16F690
FIGURE 8-2: COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM
A3 A4 A5 A6
XX
A3 A4 A5 A6
XXX
X
C1POL
C1OUT
RD_CM1CON0
Set C1IF
To
DQ
EN
Q1
Data Bus
C1POL
DQ
EN
CL
Q3*RD_CM1CON0
NRESET
MUX
C1
0
1
2
3
C1ON
(1)
C1CH<1:0>
2
C1VIN-
C1V
IN+
C12IN0-
C12IN1-
C12IN2-
C12IN3-
+
-
Note 1: When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
2: Q1 and Q3 are phases of the four-phase system clock (F
OSC).
3: Q1 is held high during Sleep mode.
0
1
C1R
MUX
C1IN+
0
1
MUX
To other peripherals
C1OUT (to SR latch)
CVREF
C1VREN
FixedRef
Rev. A5: To ECCP
Auto-Shutdown
Rev. A4 and previous:
To ECCP Auto-Shutdown