Datasheet

PIC16F684
DS41202F-page 42 © 2007 Microchip Technology Inc.
4.3.5 RC4/C2OUT/P1B
The RC4 is configurable to function as one of the
following:
• a general purpose I/O
• a digital output from the comparator
• a digital output from the Enhanced CCP
FIGURE 4-9: BLOCK DIAGRAM OF RC4
4.3.6 RC5/CCP1/P1A
The RC5 is configurable to function as one of the
following:
• a general purpose I/O
• a digital input/output for the Enhanced CCP
FIGURE 4-10: BLOCK DIAGRAM OF RC5
PIN
TABLE 4-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Note: Enabling both C2OUT and P1B will cause
a conflict on RC4 and create unpredictable
results. Therefore, if C2OUT is enabled,
the ECCP can not be used in Half-Bridge
or Full-Bridge mode and vice-versa.
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
Data Bus
WR
PORTC
WR
TRISC
RD
TRISC
RD
PORTC
0
1
Note 1: Port/Peripheral Select signals selects between
port data and peripheral output.
C2OUT EN
CCPOUT EN
C2OUT EN
C2OUT
CCPOUT EN
CCPOUT
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
Data bus
WR
PORTC
WR
TRISC
RD
TRISC
To Enhanced CCP
RD
PORTC
0
1
CCP1OUT
CCP1OUT
Enable
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR, BOR
Value on
all other
Resets
ANSEL ANS7 ANS6 ANS5 ANS4
ANS3 ANS2 ANS1 ANS0 1111 1111 1111 1111
CMCON0
C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 0000 0000 0000 0000
PORTC
— — RC5 RC4 RC3 RC2 RC1 RC0 --xx 0000 --uu uu00
TRISC
— — TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 --11 1111 --11 1111
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.