Datasheet

PIC16F684
DS41202F-page 38 © 2007 Microchip Technology Inc.
4.2.5.6 RA5/T1CKI/OSC1/CLKIN
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a Timer1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-6: BLOCK DIAGRAM OF RA5
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPUA
RD
WPUA
RD
PORTA
WR
PORTA
WR
TRISA
RD
TRISA
WR
IOCA
RD
IOCA
To Timer1
INTOSC
Mode
RD PORTA
INTOSC
Mode
RAPU
OSC2
Note 1: Timer1 LP Oscillator enabled.
TMR1LPEN
(1)
Interrupt-on-
Change
Oscillator
Circuit
Q3
I/O Pin