Datasheet
PIC16F684
DS41202F-page 2 © 2007 Microchip Technology Inc.
14-Pin Diagram (PDIP, SOIC, TSSOP)
TABLE 1: DUAL IN-LINE PIN SUMMARY
I/O Pin Analog Comparators Timer CCP Interrupts Pull-ups Basic
RA0 13 AN0 C1IN+ — — IOC Y ICSPDAT/ULPWU
RA1 12 AN1/VREF C1IN- — — IOC Y ICSPCLK
RA2 11 AN2 C1OUT T0CKI — INT/IOC Y —
RA3
(1)
4— — — — IOCY
(2)
MCLR/VPP
RA4 3 AN3 — T1G — IOC Y OSC2/CLKOUT
RA5 2 — — T1CKI — IOC Y OSC1/CLKIN
RC0 10 AN4 C2IN+ — — — — —
RC1 9 AN5 C2IN- — — — — —
RC2 8 AN6 — — P1D — — —
RC3 7 AN7 — — P1C — — —
RC4 6 — C2OUT — P1B — — —
RC5 5 — — — CCP1/P1A — — —
— 1 — — — — — — VDD
—14 — — — — — — VSS
Note 1: Input only.
2: Only when pin is configured for external MCLR.
VDD
RA5/T1CKI/OSC1/CLKIN
RA4/AN3/T1G
/OSC2/CLKOUT
RA3/MCLR
/VPP
RC5/CCP1/P1A
RC4/C2OUT/P1B
RC3/AN7/P1C
VSS
RA0/AN0/C1IN+/ICSPDAT/ULPWU
RA1/AN1/C1IN-/V
REF/ICSPCLK
RA2/AN2/T0CKI/INT/C1OUT
RC0/AN4/C2IN+
RC1/AN5/C2IN-
RC2/AN6/P1D
PIC16F684
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