Datasheet

© 2007 Microchip Technology Inc. DS40039E-page 67
PIC16F630/676
FIGURE 9-12: WATCHDOG TIMER BLOCK DIAGRAM
TABLE 9-9: SUMMARY OF WATCHDOG TIMER REGISTERS
T0CKI
T0SE
pin
CLKOUT
TMR0
Watchdog
Timer
WDT
Time-out
PS0 - PS2
WDTE
Data Bus
Set Flag bit T0IF
on Overflow
T0CS
Note 1: T0SE, T0CS, PSA, PS0-PS2 are bits in the Option register.
0
1
0
1
0
1
SYNC 2
Cycles
8
8
8-bit
Prescaler
0
1
(= FOSC/4)
PSA
PSA
PSA
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOD
Value on all
other
RESETS
81h OPTION_REG
RAPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
2007h Config. bits
CP BODEN MCLRE PWRTE WDTE F0SC2 F0SC1 F0SC0 uuuu uuuu uuuu uuuu
Legend: u = Unchanged, shaded cells are not used by the Watchdog Timer.