Datasheet

© 2007 Microchip Technology Inc. DS40039E-page 47
PIC16F630/676
7.2 A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
HOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 7-3. The source
impedance (R
S) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS)
impedance varies over the device voltage (V
DD), see
Figure 7-3. The maximum recommended imped-
ance for analog sources is 10 kΩ. As the impedance
is decreased, the acquisition time may be decreased.
After the analog input channel is selected (changed),
this acquisition must be done before the conversion
can be started.
To calculate the minimum acquisition time, Equation 7-1
may be used. This equation assumes that 1/2 LSb error
is used (1024 steps for the A/D). The 1/2 LSb error is the
maximum error allowed for the A/D to meet its specified
resolution.
To calculate the minimum acquisition time, T
ACQ, see
the PIC
®
Mid-Range Reference Manual (DS33023).
EQUATION 7-1: ACQUISITION TIME
FIGURE 7-3: ANALOG INPUT MODEL
TACQ
TC
TACQ
=
=
=
=
=
=
=
=
Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
T
AMP + TC + TCOFF
2μs + TC + [(Temperature -25°C)(0.05μs/°C)]
C
HOLD (RIC + RSS + RS) In(1/2047)
- 120pF (1kΩ + 7kΩ + 10kΩ) In(0.0004885)
16.47μs
2μs + 16.47μs + [(50°C -25°C)(0.05μs/°C)
19.72μs
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (C
HOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin
leakage specification.
CPIN
VA
R
S
ANx
5 pF
V
DD
VT = 0.6V
V
T = 0.6V
I LEAKAGE
RIC ≤ 1K
Sampling
Switch
SS
R
SS
CHOLD
= DAC capacitance
V
SS
6V
Sampling Switch
5V
4V
3V
2V
567891011
(kΩ)
VDD
= 120 pF
± 500 nA
Legend: CPIN
VT
I LEAKAGE
RIC
SS
C
HOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions