Datasheet

PIC16F630/676
DS40039E-page 40 © 2007 Microchip Technology Inc.
6.3 Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 6-3. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input, therefore, must be between
V
SS and VDD. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latchup may occur. A
maximum source impedance of 10 kΩ is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
FIGURE 6-3: ANALOG INPUT MODE
6.4 Comparator Output
The comparator output, COUT, is read through the
CMCON register. This bit is read-only. The comparator
output may also be directly output to the RA2 pin in
three of the eight possible modes, as shown in
Figure 6-2. When in one of these modes, the output on
RA2 is asynchronous to the internal clock. Figure 6-4
shows the comparator output block diagram.
The TRISA<2> bit functions as an output enable/
disable for the RA2 pin while the comparator is in an
Output mode.
FIGURE 6-4: MODIFIED COMPARATOR OUTPUT BLOCK DIAGRAM
VA
Rs < 10K
A
IN
CPIN
5 pF
VDD
VT = 0.6V
VT = 0.6V
RIC
Leakage
±500 nA
Vss
Legend: CPIN = Input Capacitance
V
T = Threshold Voltage
I
LEAKAGE = Leakage Current at the pin due to Various Junctions
R
IC = Interconnect Resistance
R
S = Source Impedance
VA = Analog Voltage
Note 1: When reading the PORTA register, all
pins configured as analog inputs will read
as a ‘0’. Pins configured as digital inputs
will convert an analog input according to
the TTL input specification.
2: Analog levels on any pin that is defined as
a digital input, may cause the input buffer
to consume more current than is
specified.
To RA2/T0CKI pin
RD CMCON
Set CMIF bit
RESET
To Data Bus
CINV
CVREF
D
EN
Q
D
EN
Q
RD CMCON
RA1/CIN-
RA0/CIN+
CM2:CM0