Datasheet

© 2007 Microchip Technology Inc. DS41232D-page 3
PIC12F635/PIC16F636/639
8-Pin Diagrams (PDIP, SOIC, DFN, DFN-S)
TABLE 1: 8-PIN SUMMARY (PDIP, SOIC, DFN, DFN-S)
I/O Pin Comparators Timer Interrupts Pull-ups Basic
GP0 7 C1IN+ — IOC Y ICSPDAT/ULPWU
GP1 6 C1IN- — IOC Y ICSPCLK
GP2 5 C1OUT T0CKI INT/IOC Y —
GP3
(1)
4— — IOC Y
(2)
MCLR/VPP
GP4 3 — T1G IOC Y OSC2/CLKOUT
GP5 2 — T1CKI IOC Y OSC1/CLKIN
— 1 — — — — VDD
—8———— VSS
Note 1: Input only.
2: Only when pin is configured for external MCLR.
PDIP, SOIC
PIC12F635
VSSVDD
GP5/T1CKI/OSC1/CLKIN
GP4/T1G
/OSC2/CLKOUT
GP3/MCLR
/VPP
GP0/C1IN+/ICSPDAT/ULPWU
GP1/C1IN-/ICSPCLK
GP2/T0CKI/INT/C1OUT
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
PIC12F635
VSS
GP0/CIN+/ICSPDAT/ULPWU
GP1/CIN-/ICSPCLK
GP2/T0CKI/INT/COUT
VDD
GP5/T1CKI/OSC1/CLKIN
GP4/T1G
/OSC2/CLKOUT
GP3/MCLR
/VDD
DFN, DFN-S