Datasheet
PIC12F635/PIC16F636/639
DS41232D-page 168 © 2007 Microchip Technology Inc.
D020 IPD Power-down Base
Current
(4)
—0.151.2 μA 2.0 WDT, BOR,
Comparators, V
REF
and T1OSC disabled
—0.201.5 μA3.0
— 0.35 1.8 μA5.0
D021 — 1.0 2.2 μA 2.0 WDT Current
(1)
—2.04.0μA3.0
—3.07.0μA5.0
D022A — 58 60 μA 3.0 BOR Current
(1)
—109122μA5.0
D022B — 22 28 μA 2.0 PLVD Current
—25 35μA3.0
—33 45μA5.0
D023 — 32 45 μA 2.0 Comparator Current
(3)
—60 78μA3.0
—120160μA5.0
D024A — 30 36 μA2.0CV
REF Current
(1)
(high-range)
—45 55μA3.0
—75 95μA5.0
D024B — 39 47 μA2.0CVREF Current
(1)
(low-range)
—59 72μA3.0
—98124μA5.0
D025 — 4.5 7.0 μA 2.0 T1OSC Current
(3)
—5.08.0μA3.0
—6.0 12 μA5.0
15.2 DC Characteristics: PIC12F635/PIC16F636-I (Industrial) (Continued)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ T
A ≤ +85°C for industrial
Param
No.
Sym Device Characteristics Min Typ† Max Units
Conditions
VDD Note
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: The test conditions for all I
DD measurements in Active Operation mode are: OSC1 = external square
wave, from rail-to-rail; all I/O pins tri-stated, pulled to V
DD; MCLR = VDD; WDT disabled. MCU only, Analog
Front-End not included.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O
pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have
an impact on the current consumption. MCU only, Analog Front-End not included.
3: The peripheral current is the sum of the base I
DD or IPD and the additional current consumed when this
peripheral is enabled. The peripheral Δ current can be determined by subtracting the base I
DD or IPD
current from this limit. Max values should be used when calculating total current consumption.
4: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is
measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to V
DD.