Datasheet

PIC12F635/PIC16F636/639
DS41232D-page 140 © 2007 Microchip Technology Inc.
12.9.2 TIMER INTERRUPT
An overflow (FFh → 00h) in the TMR0 register will set
the T0IF bit of the INTCON register. The interrupt can be
enabled/disabled by setting/clearing T0IE bit of the
INTCON register. See Section 5.0 “Timer0 Module”
for operation of the Timer0 module.
12.9.3 PORTA INTERRUPT
An input change on PORTA change sets the RAIF bit of
the INTCON register. The interrupt can be
enabled/disabled by setting/clearing the RAIE bit of the
INTCON register. Plus, individual pins can be configured
through the IOCA register.
FIGURE 12-7: INTERRUPT LOGIC
Note: If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RAIF
interrupt flag may not get set.
TMR1IF
TMR1IE
C1IF
C1IE
T0IF
T0IE
INTF
INTE
RAIF
RAIE
GIE
PEIE
Wake-up (If in Sleep mode)
Interrupt to CPU
CRIE
CRIF
EEIF
EEIE
IOC-RA0
IOCA0
IOC-RA1
IOCA1
IOC-RA2
IOCA2
IOC-RA3
IOCA3
IOC-RA4
IOCA4
IOC-RA5
IOCA5
LVDIF
LVDIE
OSFIF
OSFIE
C2IF
(1)
C2IE
(1)
Note 1: PIC16F636/639 only.