Datasheet

© 2007 Microchip Technology Inc. DS41232D-page 131
PIC12F635/PIC16F636/639
12.2 Reset
The PIC12F635/PIC16F636/639 differentiates between
various kinds of Reset:
a) Power-on Reset (POR)
b) Wake-up Reset (WUR)
c) WDT Reset during normal operation
d) WDT Reset during Sleep
e) MCLR
Reset during normal operation
f) MCLR
Reset during Sleep
g) Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
•MCLR
Reset
•MCLR
Reset during Sleep
•WDT Reset
• Brown-out Reset
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO
and
PD
bits are set or cleared differently in different Reset
situations, as indicated in Table 12-3. These bits are
used in software to determine the nature of the Reset.
See Table 12-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR
Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse width specifications.
FIGURE 12-1: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External Reset
MCLR/VPP pin
VDD
OSC1/
WDT
Module
V
DD Rise
Detect
OST/PWRT
LFINTOSC
WDT
Time-out
Power-on Reset
OST
10-bit Ripple Counter
PWRT
Chip_Rese
t
11-bit Ripple Counter
Reset
Enable OST
Enable PWRT
Sleep
Brown-out
(1)
Reset
SBOREN
BOREN<0>
CLKI pin
Note 1: Refer to the Configuration Word register (Register 12-1).
Sleep
WURE
RA3 Change
Wake-up Interrupt
BOREN
<1>