Datasheet

© 2007 Microchip Technology Inc. DS41232D-page 127
PIC12F635/PIC16F636/639
See Table 11-7 for the bit conditions of the AFE Status
Register after various SPI commands and the AFE
Power-on Reset.
TABLE 11-7: AFE STATUS REGISTER BIT CONDITION (AFTER POWER-ON RESET AND
VARIOUS SPI COMMANDS)
REGISTER 11-8: AFE STATUS REGISTER 7
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
CHZACT CHYACT CHXACT AGCACT WAKEZ WAKEY WAKEX ALARM PEI
bit 8 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 8 CHZACT: Channel Z Active
(1)
bit (cleared via Soft Reset)
1 = Channel Z is passing data after T
AGC
0 = Channel Z is not passing data after TAGC
bit 7 CHYACT: Channel Y Active
(1)
bit (cleared via Soft Reset)
1 = Channel Y is passing data after T
AGC
0 = Channel Y is not passing data after TAGC
bit 6 CHXACT: Channel X Active
(1)
bit (cleared via Soft Reset)
1 = Channel X is passing data after T
AGC
0 = Channel X is not passing data after TAGC
bit 5 AGCACT: AGC Active Status bit (real time, cleared via Soft Reset)
1 = AGC is active (Input signal is strong). AGC is active when input signal level is approximately > 20 mV
PP range.
0 = AGC is inactive (Input signal is weak)
bit 4 WAKEZ: Wake-up Channel Z Indicator Status bit (cleared via Soft Reset)
1 = Channel Z caused a AFE wake-up (passed ÷64 clock counter)
0 = Channel Z did not cause a AFE wake-up
bit 3 WAKEY: Wake-up Channel Y Indicator Status bit (cleared via Soft Reset)
1 = Channel Y caused a AFE wake-up (passed ÷64 clock counter)
0 = Channel Y did not cause a AFE wake-up
bit 2 WAKEX: Wake-up Channel X Indicator Status bit (cleared via Soft Reset)
1 = Channel X caused a AFE wake-up (passed ÷64 clock counter)
0 = Channel X did not cause a AFE wake-up
bit 1 ALARM: Indicates whether an Alarm timer time-out has occurred (cleared via read “Status Register command”)
1 = The Alarm timer time-out has occurred. It may cause the ALERT
output to go low depending on the state of bit 4 of the
Configuration register 0
0 = The Alarm timer is not timed out
bit 0 PEI: Parity Error Indicator bit – indicates whether a Configuration register parity error has occurred (real time)
1 = A parity error has occurred and caused the ALERT
output to go low
0 = A parity error has not occurred
Note 1: Bit is high whenever channel is passing data. Bit is low in Standby mode.
Condition
Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
CHZACT CHYACT CHXACT AGCACT WAKEZ WAKEY WAKEX ALARM PEI
POR 0 0 0 0 00001
Read Command
(STATUS Register only)
u u u u uuu0u
Sleep Command u u u u uuuuu
Soft Reset Executed
(1)
0 0 0 0 000uu
Legend: u = unchanged
Note 1: See Section 11.20 “Soft Reset” and Section 11.32.2.4 “Soft Reset Command” for the condition of Soft Reset
execution.