Datasheet

© 2007 Microchip Technology Inc. DS41232D-page 119
PIC12F635/PIC16F636/639
FIGURE 11-17: SPI WRITE SEQUENCE
CS
SCLK/
LFDATA/RSSI/
TSU
THD
TCSSC TSCCS
THI TLO
1/FSCLK
TCS1
TCSH
TCS0
CCLK/SDIO
ALERT
LFDATA SDI
(output) (input)
(output)
SCLK
(input)
ALERT
(output)
Driven low by MCU Driven low by MCU
LFDATA
(output)
MCU pin to Input
MCU pin to Input
Driven low by MCU
16 Clocks for Write Command, Address and Data
ALERT
MCU pin to Output
MCU pin still Input
1
2
3
4
5
6
7
MCU SPI Write Details:
1. Drive the AFE’s open collector ALERT
output low.
• To ensure no false clocks occur when CS
drops.
2. Drop CS.
•AFE SCLK/ALERT becomes SCLK input.
• LFDATA/RSSI/CCLK/SDIO becomes SDI input.
3. Change LFDATA/RSSI/CCLK/SDIO connected pin to output.
• Driving SPI data.
4. Clock in 16-bit SPI Write sequence - command, address, data and parity bit.
• Command, address, data and parity bit.
5. Change LFDATA/RSSI/CCLK/SDIO connected pin to input.
6. Raise CS
to complete the SPI Write.
7. Change SCLK/ALERT
back to input.
LSbMSb