Datasheet

PIC12F635/PIC16F636/639
DS41232D-page 10 © 2007 Microchip Technology Inc.
FIGURE 1-2: PIC16F636 BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
8
8
8
3
8-level Stack
128
2K x 14
bytes
(13-bit)
Timer0 Timer1
Data
EEPROM
256 bytes
EEDAT
EEADDR
T0CKI
T1CKI
Configuration
T1G
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
Module
2 Analog Comparators
and Reference
C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT
PORTA
RA0
RA1
RA2
RA3
RA4
RA5
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
MCLR
VDD
Brown-out
Reset
VSS
Programmable
Low-Voltage Detect
Wake-up
Reset
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
31 kHz
Oscillator
Internal
8 MHz
Oscillator
Internal
Cryptographic