Datasheet

© 2007 Microchip Technology Inc. DS41232D-page 9
PIC12F635/PIC16F636/639
1.0 DEVICE OVERVIEW
This document contains device specific information for
the PIC12F635/PIC16F636/639 devices.
Block Diagrams and pinout descriptions of the devices
are as follows:
• PIC12F635 (Figure 1-1, Table 1-1)
• PIC16F636 (Figure 1-2, Table 1-2)
• PIC16F639 (Figure 1-3, Table 1-3)
FIGURE 1-1: PIC12F635 BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
GPIO
8
8
8
3
8-level Stack
64 bytes
1K x 14
(13-bit)
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
MCLR
VDD
Brown-out
Reset
Cryptographic
Timer0 Timer1
Data
EEPROM
128 bytes
EEDAT
EEADDR
GP0
GP1
GP2
GP3
GP4
GP5
Module
T0CKI
T1CKI
Configuration
T1G
1 Analog
Comparator
and Reference
C1IN- C1IN+ C1OUT
VSS
Programmable
Low-Voltage Detect
Wake-up
Reset
31 kHz
Oscillator
Internal
8 MHz
Oscillator
Internal