Datasheet

© 2009 Microchip Technology Inc. DS40044G-page 87
PIC16F627A/628A/648A
TABLE 12-9: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
FIGURE 12-8: SYNCHRONOUS TRANSMISSION
FIGURE 12-9: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR
Value on all
other Resets
0Ch PIR1
EEIF CMIF RCIF TXIF — CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000
18h RCSTA SPEN RX9 SREN CREN ADEN FERR OERR RX9D 0000 000x 0000 000x
19h TXREG USART Transmit Data Register 0000 0000 0000 0000
8Ch PIE1
EEIE CMIE RCIE TXIE — CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000
98h TXSTA CSRC TX9 TXEN SYNC
— BRGH TRMT TX9D 0000 -010 0000 -010
99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
bit 0 bit 1 bit 7
Word 1
Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4 Q3Q4 Q1Q2Q3Q4 Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4Q1Q2Q3Q4
bit 2 bit 0 bit 1 bit 7
RB1/RX/DT pin
RB2/TX/CK pin
Write to
TXREG Reg
TXIF bit
(Interrupt Flag)
TRMT
TXEN bit
‘1’
‘1’
Word 2
TRMT bit
Write Word 1
Write Word 2
Note: Sync Master Mode; SPBRG = 0. Continuous transmission of two 8-bit words.
RB1/RX/DT pin
RB2/TX/CK pin
Write to
TXREG Reg
TXIF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit