Datasheet
PIC16F627A/628A/648A
DS40044G-page 64 © 2009 Microchip Technology Inc.
10.1 Comparator Configuration
There are eight modes of operation for the
comparators. The CMCON register is used to select
the mode. Figure 10-1 shows the eight possible
modes. The TRISA register controls the data direction
of the comparator pins for each mode.
If the Comparator mode is changed, the comparator
output level may not be valid for the specified mode
change delay shown in Table 17-2.
FIGURE 10-1: COMPARATOR I/O OPERATING MODES
Note 1: Comparator interrupts should be disabled
during a Comparator mode change,
otherwise a false interrupt may occur.
2: Comparators can have an inverted
output. See Figure 10-1.
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Comparators Reset (POR Default Value)
A
A
CM<2:0> = 000
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Two Independent Comparators
A
A
CM<2:0> = 100
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Two Common Reference Comparators
A
D
CM<2:0> = 011
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Off (Read as ‘0’)
One Independent Comparator
D
D
CM<2:0> = 101
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
C1
V
IN-
V
IN+
Off (Read as ‘0’)
Comparators Off
D
D
CM<2:0> = 111
C2
V
IN-
V
IN+
Off (Read as ‘0’)
D
D
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Four Inputs Multiplexed to Two Comparators
A
A
CM<2:0> = 010
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
From VREF
CIS = 0
CIS = 1
CIS = 0
CIS = 1
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Two Common Reference Comparators with Outputs
A
D
CM<2:0> = 110
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
Open Drain
A = Analog Input, port reads zeros always.
D = Digital Input.
CIS (CMCON<3>) is the Comparator Input Switch.
RA4/T0CKI/CMP2
C1
RA0/AN0
V
IN-
V
IN+
RA3/AN3/CMP1
Three Inputs Multiplexed to Two Comparators
A
A
CM<2:0> = 001
C2
RA1/AN1
V
IN-
V
IN+
RA2/AN2/V
REF
A
A
CIS = 0
CIS = 1
VSS
VSS
RA0/AN0
RA3/AN3/CMP1
RA1/AN1
RA2/AN2/V
REF
Module
C1V
OUT
C2VOUT
C1VOUT
C2VOUT
Off (Read as ‘0’)
Off (Read as ‘0’)
C2V
OUT
C1VOUT
C2VOUT
C1VOUT
C2VOUT
C1VOUT
C2VOUT