Datasheet

PIC16F627A/628A/648A
DS40044G-page 44 © 2009 Microchip Technology Inc.
FIGURE 5-15: BLOCK DIAGRAM OF THE RB7/T1OSI/PGD PIN
Data Latch
TRIS Latch
RD TRISB
Q
D
Q
CK
Q
D
Q
CK
RD PORTB
WR PORTB
WR TRISB
T10SCEN
Data Bus
RB7/T1OSI/
To R B 6
RBPU
VDD
weak pull-up
P
PGD pin
TTL
input
buffer
From other
QD
EN
QD
EN
Set RBIF
RB<7:4> pins
Serial Programming Input
Schmitt
Trigger
TMR1 oscillator
VDD
VSS
Q3
Q1