Datasheet

© 2009 Microchip Technology Inc. DS40044G-page 43
PIC16F627A/628A/648A
FIGURE 5-14: BLOCK DIAGRAM OF RB6/T1OSO/T1CKI/PGC PIN
Data Latch
TRIS Latch
RD TRISB
Q
D
Q
CK
Q
D
Q
CK
RD PORTB
WR PORTB
WR TRISB
Schmitt
Trigger
T1OSCEN
Data Bus
RB6/
TMR1 Clock
RBPU
VDD
weak pull-up
P
From RB7
T1OSO/
T1CKI/
PGC
From other
QD
EN
Set RBIF
RB<7:4> pins
Serial Programming Clock
TTL
input
buffer
TMR1 oscillator
QD
EN
VDD
VSS
Q3
Q1
pin