Datasheet

PIC16F627A/628A/648A
DS40044G-page 40 © 2009 Microchip Technology Inc.
FIGURE 5-11: BLOCK DIAGRAM OF
RB3/CCP1 PIN
Data Latch
TRIS Latch
RD TRISB
Q
D
Q
CK
Q
D
Q
CK
0
1
WR PORTB
WR TRISB
Schmitt
Trigger
Peripheral OE
(2)
Data Bus
CCP1CON
CCP output
CCP In
RBPU
VDD
P
EN
QD
VDD
VSS
Note 1: Peripheral OE (output enable) is only active if
peripheral select is active.
RD PORTB
TTL
Input
Buffer
RB3/
CCP1
Weak
Pull-up