Datasheet

PIC16F627A/628A/648A

TABLE 4-6: SPECIAL FUNCTION REGISTERS SUMMARY BANK3

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Value on

POR

Reset

(1)

Details

on Page

Bank 3

180h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 30

181h OPTION RBPU

INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 25

182h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 30

183h STATUS IRP RP1 RP0 TO

PD ZDCC0001 1xxx 24

184h FSR Indirect Data Memory Address Pointer xxxx xxxx 30

185h — Unimplemented — —

186h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 38

187h — Unimplemented — —

188h — Unimplemented — —

189h — Unimplemented — —

18Ah PCLATH

— — — Write Buffer for upper 5 bits of Program Counter ---0 0000 30

18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 26

18Ch — Unimplemented — —

18Dh — Unimplemented — —

18Eh — Unimplemented — —

18Fh — Unimplemented — —

190h — Unimplemented — —

191h — Unimplemented — —

192h — Unimplemented — —

193h — Unimplemented — —

194h — Unimplemented — —

195h — Unimplemented — —

196h — Unimplemented — —

197h — Unimplemented — —

198h — Unimplemented — —

199h — Unimplemented — —

19Ah — Unimplemented — —

19Bh — Unimplemented — —

19Ch — Unimplemented — —

19Dh — Unimplemented — —

19Eh — Unimplemented — —

19Fh — Unimplemented — —

Legend: - = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented

Note 1: For the initialization condition for registers tables, refer to Table 14-6 and Table 14-7.