Datasheet

PIC16F627A/628A/648A

TABLE 4-5: SPECIAL FUNCTION REGISTERS SUMMARY BANK2

Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Value on

POR

Reset

(1)

Details

on Page

Bank 2

100h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 30

101h TMR0

Timer0 Module’s Register xxxx xxxx

102h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 30

103h STATUS IRP RP1 RP0 TO

PD ZDCC0001 1xxx 24

104h FSR Indirect Data Memory Address Pointer xxxx xxxx 30

105h — Unimplemented — —

106h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx 38

107h — Unimplemented — —

108h — Unimplemented — —

109h — Unimplemented — —

10Ah PCLATH

— — — Write Buffer for upper 5 bits of Program Counter ---0 0000 30

10Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 26

10Ch — Unimplemented — —

10Dh — Unimplemented — —

10Eh — Unimplemented — —

10Fh — Unimplemented — —

110h — Unimplemented — —

111h — Unimplemented — —

112h — Unimplemented — —

113h — Unimplemented — —

114h — Unimplemented — —

115h — Unimplemented — —

116h — Unimplemented — —

117h — Unimplemented — —

118h — Unimplemented — —

119h — Unimplemented — —

11Ah — Unimplemented — —

11Bh — Unimplemented — —

11Ch — Unimplemented — —

11Dh — Unimplemented — —

11Eh — Unimplemented — —

11Fh — Unimplemented — —

Legend: - = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented.

Note 1: For the initialization condition for registers tables, refer to Table 14-6 and Table 14-7.