Datasheet

© 2009 Microchip Technology Inc. DS40044G-page 17
PIC16F627A/628A/648A
4.0 MEMORY ORGANIZATION
4.1 Program Memory Organization
The PIC16F627A/628A/648A has a 13-bit program
counter capable of addressing an 8K x 14 program
memory space. Only the first 1K x 14 (0000h-03FFh)
for the PIC16F627A, 2K x 14 (0000h-07FFh) for the
PIC16F628A and 4K x 14 (0000h-0FFFh) for the
PIC16F648A are physically implemented. Accessing a
location above these boundaries will cause a wrap-
around within the first 1K x 14 space (PIC16F627A),
2K x 14 space (PIC16F628A) or 4K x 14 space
(PIC16F648A). The Reset vector is at 0000h and the
interrupt vector is at 0004h (Figure 4-1).
FIGURE 4-1: PROGRAM MEMORY MAP
AND STACK
4.2 Data Memory Organization
The data memory (Figure 4-2 and Figure 4-3) is
partitioned into four banks, which contain the General
Purpose Registers (GPRs) and the Special Function
Registers (SFRs). The SFRs are located in the first 32
locations of each bank. There are General Purpose
Registers implemented as static RAM in each bank.
Table 4-1 lists the General Purpose Register available
in each of the four banks.
TABLE 4-1: GENERAL PURPOSE STATIC
RAM REGISTERS
Addresses F0h-FFh, 170h-17Fh and 1F0h-1FFh are
implemented as common RAM and mapped back to
addresses 70h-7Fh.
Table 4-2 lists how to access the four banks of registers
via the Status register bits RP1 and RP0.
TABLE 4-2: ACCESS TO BANKS OF
REGISTERS
4.2.1 GENERAL PURPOSE REGISTER
FILE
The register file is organized as 224 x 8 in the
PIC16F627A/628A and 256 x 8 in the PIC16F648A.
Each is accessed either directly or indirectly through
the File Select Register (FSR), See Section 4.4
“Indirect Addressing, INDF and FSR Registers”.
PC<12:0>
13
000h
0004
0005
03FFh
1FFFh
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-chip Program
Memory
CALL, RETURN
RETFIE, RETLW
Stack Level 2
07FFh
PIC16F627A,
PIC16F628A and
PIC16F648A
On-chip Program
Memory
PIC16F628A and
PIC16F648A
On-chip Program
Memory
PIC16F648A only
0FFFh
PIC16F627A/628A PIC16F648A
Bank0 20-7Fh 20-7Fh
Bank1 A0h-FF A0h-FF
Bank2 120h-14Fh, 170h-17Fh 120h-17Fh
Bank3 1F0h-1FFh 1F0h-1FFh
Bank RP1 RP0
0 00
1 01
2 10
3 11