Datasheet

PIC16F627A/628A/648A
DS40044G-page 144 © 2009 Microchip Technology Inc.
17.6 Timing Diagrams and Specifications
FIGURE 17-4: EXTERNAL CLOCK TIMING
TABLE 17-4: EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
F
OSC External CLKIN Frequency
(1)
DC — 4 MHz XT and RC Osc mode,
V
DD = 5.0 V
DC — 20 MHz HS, EC Osc mode
DC — 200 kHz LP Osc mode
Oscillator Frequency
(1)
— — 4 MHz RC Osc mode, VDD = 5.0V
0.1 — 4 MHz XT Osc mode
1
—
—
—
20
200
MHz
kHz
HS Osc mode
LP Osc mode
— 4 — MHz INTOSC mode (fast)
— 48 — kHz INTOSC mode (slow)
1T
OSC External CLKIN Period
(1)
250 — — ns XT and RC Osc mode
50 — — ns HS, EC Osc mode
5——μsLP Osc mode
Oscillator Period
(1)
250 — — ns RC Osc mode
250 — 10,000 ns XT Osc mode
50 — 1,000 ns HS Osc mode
5——μsLP Osc mode
— 250 — ns INTOSC mode (fast)
—21—μs INTOSC mode (slow)
2T
CY Instruction Cycle Time 200 TCY DC ns TCY = 4/FOSC
3TosL,
TosH
External CLKIN (OSC1) High
External CLKIN Low
100* — — ns XT oscillator, T
OSC L/H duty
cycle
4 RC External Biased RC
Frequency
10 kHz* — 4 MHz — V
DD = 5.0V
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time-based period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator oper-
ation and/or higher than expected current consumption. All devices are tested to operate at “Min” values
with an external clock applied to the OSC1 pin. When an external clock input is used, the “Max” cycle time
limit is “DC” (no clock) for all devices.
OSC1
CLKOUT
Q4
Q1 Q2
Q3 Q4 Q1
133
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