Datasheet

 2003 Microchip Technology Inc. Preliminary DS40300C-page 31
PIC16F62X
FIGURE 5-4: BLOCK DIAGRAM OF RA4/T0CKI PIN
FIGURE 5-5: BLOCK DIAGRAM OF THE
RA5/MCLR
/VPP PIN
FIGURE 5-6: BLOCK DIAGRAM OF
RA6/OSC2/CLKOUT PIN
Data
Bus
QD
Q
CK
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Vss
RA4 Pin
QD
Q
CK
DQ
EN
TMR0 Clock Input
Schmitt Trigger
Input Buffer
Comparator Output
Comparator Mode = 110
1
0
Vss
VDD
DQ
EN
HV Detect
MCLR
Filter
RA5/MCLR/VPP
MCLR
Program
MCLRE
RD
VSS
Data
Bus
VSS
PORTA
RD
circuit
mode
Schmitt Trigger
Input Buffer
TRISA
WR
D
CK
Q
Q
1
0
PORTA
WR
TRISA
VDD
VSS
CLKOUT(FOSC/4)
(FOSC =
101, 111)
(2)
QD
RD
EN
RD PORTA
F
OSC =
D
CK
Q
Q
100, 110
(1)
TRISA
From OSC1
OSC
Circuit
Note 1: INTRC with RA6 = I/O or ER with RA6 = I/O.
2: INTRC with RA6 = CLKOUT or ER with RA6 = CLK-
OUT.
Schmitt
Trigger
Input Buffer
Data Latch
TRIS Latch